Closed · HR001117S0055 · CFDA 12.910 · Discretionary
Electronics Resurgence Initiative: Page 3 Investments Architectures Thrust
Federal grant opportunity posted by DARPA - Microsystems Technology Office, cataloged on Grants.gov.
- Varies
- Award range
- Closed
- Status
- -
- Close date
- -
- Expected awards
The verdict
Electronics Resurgence Initiative: Page 3 Investments Architectures Thrust is a closed discretionary listing from DARPA - Microsystems Technology Office that offered Varies by applicant. Future funding cycles may be published under the same CFDA number.
- Varies
- award range
- Closed
- application status
- 12.910
- CFDA program
Opportunity snapshot. This Grants.gov announcement - Electronics Resurgence Initiative: Page 3 Investments Architectures Thrust - is cataloged under number HR001117S0055 and tied to CFDA assistance listing 12.910, posted by DARPA - Microsystems Technology Office. Grants.gov currently shows the opportunity as closed, first posted on September 13, 2017 and last updated on November 10, 2017. The funding category is Discretionary, delivered as a procurement contract.
Award economics. The award range on file is Varies by applicant. Cost sharing is not required, so applicants do not need to commit matching funds to be competitive on this opportunity. Federal award ranges are often upper bounds; actual allocations reflect program appropriations, the strength of the applicant pool, and the evaluation committee's scoring.
Deadline and action path. This opportunity is closed. Monitoring the parent program page is the most reliable way to catch re-announcements in the next funding cycle. Every Grants.gov submission requires an active SAM.gov registration and a Unique Entity ID. Review the Eligibility section below carefully, federal eligibility categories (nonprofit, state or local government, tribal, individual, educational institution, small business) have distinct registration and reporting requirements. Pre-application outreach to the listed agency contact is permitted and often welcomed, it helps clarify scope and scoring priorities. Before acting on the deadline or award figures above, verify them directly on the official Grants.gov listing, amendments can change dates and amounts after this page was last refreshed.
Award Range
Varies by applicant
Close Date
Not specified
The full proposal must be submitted via the DARPA BAA website on or before 1:00 PM, Eastern Time, December 8, 2017. If deemed compliant, the Government will evaluate all such proposals in the initial round of selections.Additionally, proposals may be submitted after the above due date until 1:00 PM, Eastern Time, January 31, 2018 which, if deemed compliant, will be reviewed at the Government’s discretion, depending upon the availability of funding. Proposers are warned that the likelihood of available funding is greatly reduced for proposals submitted after the initial closing date deadline.
Posted
September 13, 2017
Instrument
Procurement Contract
Description
Amendment 03: The purpose of this amendment is to revise the response date. See the attached conformed BAA with changes highlighted in yellow. Amendment 02: The purpose of this amendment is to correct a typographical error in the abstract details on page 41. See the attached conformed BAA with changes highlighted in yellow.Amendment 01: The purpose of this amendment is to make administrative changes as highlighted in yellow in the attached.Original Synopsis Below:DARPA is soliciting innovative research proposals in the area of novel computing architectures. The Page 3 Architectures thrust of the Electronics Resurgence Initiative (ERI) seeks to demonstrate heterogeneous computing systems that provide the performance advantages of specialized processors, while maintaining the programmability of general purpose processors.The goal of the Software Defined Hardware (SDH) program is to build runtime-reconfigurable hardware and software that enables near ASIC performance without sacrificing programmability for data-intensive algorithms. SDH will create a hardware/software system that allows data-intensive algorithms to run at near ASIC efficiency without the cost, development time or single application limitations associated with ASIC development. The overall goal of the Domain-specific System on Chip (DSSoC) program is to develop a heterogeneous SoC comprised of many cores that mix general-purpose processors, special-purpose processors, hardware accelerators, memory, and input/output (I/O). DSSoC seeks to enable rapid development of multi-application systems through a single programmable device.
Eligibility
Grants.gov lists this opportunity under eligibility category code 99. These codes correspond to applicant types (state/local government, tribal organization, nonprofit, educational institution, individual, small business, etc.) defined in Grants.gov's own eligibility reference. See the current Grants.gov eligibility categories or check the official listing below for this opportunity's exact eligibility statement.
Official Listing on Grants.gov
View full details, application forms, and submission instructions.
Agency Contact
BAA Coordinator
Key Dates
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